ARM-based Excalibur comparison

( original link  of this document )

Pin-out

So we are lucky: The EPXA1 and EPXA4 in the 672 Pin FBGA have the same pin-out for dedicated pins like power, configuration and the pins dedicated to the embedded stripe (ARM CPU, memory interface etc.). The colours in the graphics represents I/O blocks with common power-pins. EPXA4 has LVDS-support, the green block on the left are the 16 receive-channels. The violet block on the right are the transmit channels. Click on the graphics to get a detailed view of the pin-out

EPXA1: EPXA1 EPXA4: EPXA4

A detailed comparison can be found here(~270Kb). 

PLL

Altera says there are 4 PLLs like in every APEX, so there must be also 4 in EPXA and 2 additional so called ClockBoost PLLs are in the EPXA:

Within the PLD, four PLLs are available as in the APEX devices. In addition to the four APEX PLLs, ARM-based embedded processor PLDs have two ClockBoost PLLs that are frequencyprogrammable- both at configuration and via the system bus-to provide clocks for the following devices:

The additional PLLs and associated routing support the following features: The memory controller PLL allows users to tune the frequency of the system clock to the speed of the external memory implemented in their systems.

Details

Next table is a part list, if there are more than one part with the same number, these parts are replaceable without changing layout. Where a price exists these are available.
Part # Name Datasheet Footprint/Package Price
U1 EPXA1F672 ds_arm.pdf 672 Pin FBGA 383EUR..538EUR(ebv)
U1 EPXA4F672 ds_arm.pdf 672 Pin FBGA 561EUR..1413EUR (ebv)
U2 TTC Chip s. TTC-Page s. TTC-Page s. TTC-Page
U3 SDRAM 128Mbit infineon download P-TSOPII-54 s. page 20 N/A
U3 SDRAM 128Mbit Micron (Altera reference) MT48LC8M16A2TG TSOP-54 s. page 56 N/A (samples)
U3 SDRAM 256Mbit infineon download P-TSOPII-54 s. page 20 ~10EUR (ebv)
U3 SDRAM 256Mbit Micron (Altera reference) MT48LC16M16A2TG-75 TSOP-54 s. page 59 16EUR (Rutronik)
U3 SDRAM 512Mbit infineon download P-TSOPII-54 s. page 20 N/A
U4 FLASH 32MBit AM29DL32xG 48Pin standard TSOP s. page 52 N/A
U4 FLASH 64MBit AM29DL640G 48Pin standard TSOP s. page 51 N/A
U5 Ethernet PHY TDK 78Q2120 80-Lead TQFP s. page 31 8,15EUR (Atlantik Elektronik)
U5 Ethernet PHY AMD Am79C874 80-Lead TQFP s. page 59 11,40EUR (Spoerle)
U6 12Bit, 8xA/D, int. Vref, SPI MAX147 SSOP-20 s. last page 13EUR..20EUR (RS)
U7 3.3V 3A Voltage Regulator LM2676 TO-263 6 EUR (ebv)(8 weeks)/Spoerle
U7 3.3V 3A LDO Voltage Regulator LP3963ES-3.3 TO-263 3 EUR (ebv)(8 weeks)/Spoerle - available
U8 1.8V 1.5A Voltage Regulator LP3962EMP-1.8 TO-263 1,80EUR..4EUR (Farnell)/Spoerle
U9 2.5V 1.5A Voltage Regulator LP3962EMP-2.5 TO-263 2.60EUR (ebv)(8 weeks)/Spoerle

U5: Ethernet Physical Layer

The TDK 78Q2120 and the AMD Am79C874 NetPHY-1LP device are generally pin-for-pin replacements. The NetPHY-1LP device includes additional functionality, beyond that of the 78Q2120. One major feature is the 100BASE-FX operation mode (more...). But fiber-optic transceivers with MT-RJ fiber connector are usually quite big (50x15mm˛). Have a look at some application note of Agilent and datasheets of transceivers (1 2).

As planned last meeting (19.6.2002) we should foresee a connector for the MII. This connector should be in parallel to the connection to the on-board PHY, which can be put into a mode where all pins are in the high-impendance tristate state. For evaluating the FX-port of the AMD device we can put it and a transceiver on a add-on board. 

Open questions/tests

Power connector?

Ethernet behaviour without coupler -- it works, look at 10BaseT Transmission in a Magnetic Field

Quartus test with pin-assignement and 'upwards migrate' 

Tobias Krawutschke

[Tue Sep 10 19:39:22 2002]