module dffs_r_e(d, clk, aclr, srst, ce, qfdc, qfdr, qfdce, qfdre); input d, clk, aclr, srst, ce; output qfdc, qfdr, qfdce, qfdre; reg qfdc, qfdr, qfdce, qfdre; always @(posedge clk) begin if (srst==1) qfdr <= 0; else qfdr <= d; end always @(posedge clk) begin if (srst==1) qfdre <= 0; else if (ce==1) qfdre <= d; end always @(posedge clk or posedge aclr) begin if (aclr==1) qfdc <= 0; else qfdc <= d; end always @(posedge clk or posedge aclr) begin if (aclr==1) qfdce <= 0; else if (ce==1) qfdce <= d; end endmodule