Review of the Outer Tracker Front End Electronics

Date:    April  27, 2005

Venue:  NIKEEF  ,   Room 041

Web page of the EDR

Agenda

     9:30    HV Boards:  (15 min)      T.Sluijk ???

     9:50    ASDBLR and OTIS Boards  (30 min)   A.Berkien/A.Zwart ????

   10:40    GOL/Aux Board and ORx  Card  (15 min)  D.Wiedner

   11:00   Mechanical Assembly of the FE box  (15 min)   A.Berkien

   11:10   OTIS 1.2  (20 min)  U.Trunk

   12:00   Services:/ Distribution boxes (30min)  A.Zwart

    ------   12:45 - 13:30 Lunch Break ---------------------

    13:30   Grounding and Shielding  and Power supplies (20 min) T.Sluijk

    14:00   Schedule  (10 min)  U.Uwer

    14:20   Discussion

    15:20   Meeting of Reviewers
 

Documentation:

Overview: Description of the LHCb Outer Tracker Electronics

Front-End Boards:

ASDblr Board Prototype: Description of the ASDblr board
OTIS Board (Version 1.0): Description of the first OTIS board
Auxiliary Board (Prototype):  Description of the GOL/Aux Board
Power Dissipation: estimation and  measurement

OTIS Chip:

OTIS - A TDC chip for the LHCb Outer Tracker (pdf))
Reset Handling (pdf)   Describes the types and the handling of the resets of the chip.
Specification of OTIS-to-ASDblr Interface
OTIS 1.1 Reference Manual (pdf)

Optical Link:

Auxiliary Board (Prototype):  Description of the GOL/Aux Board
Optical 12 Input Receiver (Prototype)
Synchronization of the OT Optical Links

Power Sypply, Grounding, Services:

Grounding and Shielding:
Service and Distribution Box: Describes the distribution of Slow Control, Fast Controll signals, High and
Test Pulse system (preliminary)
.

ASDblr Chip (for reference only):

UPenn ATLAS ASDblr page (general)
UPenn ATALS ASDblr page (DMILL results)
ATLAS ASDblr page

Level-0/1 Specs / TELL1 board (for reference only):

Requirements to the L0 front-end electrocnics
Requirements to the L1 front-end electrocnics
L1 Readout Board (TELL1 Board)

Other related documents:

Radiation environment in LHCb