module barrel_v(a, shd, amode, y);
parameter N = 16;
parameter M = 3;
input amode;
input [N-1:0] a;
input [M-1:0] shd;
output [N-1:0] y;
reg [N-1:0] y;
integer i;
wire msb;
assign msb = amode & a[N-1];
always @(a or shd or msb)
begin
for (i = 0; i < N; i = i + 1)
begin
if (i > (N - 1 - shd)) y[i] = msb;
else y[i] = a[i + shd];
end
end
endmodule