LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; entity bidir is port ( iopin : inout std_logic; din : out std_logic; dout : in std_logic; oe : in std_logic); end bidir; architecture a of bidir is begin -- pin --> core with iopin select din <= '0' when '0'|'L', '1' when '1'|'H', 'X' when others; -- core --> pin with oe select iopin <= dout when '1', 'Z' when '0', 'X' when others; end;